? semiconductor components industries, llc, 2015 august, 2015 ? rev. 1 1 publication order number: esd8101/d esd8101, esd8111 esd protection diodes ultra low capacitance esd protection diode for high speed data line the esd81x1 series esd protection diodes are designed to protect high speed data lines from esd. ultra?low capacitance and low esd clamping voltage make this device an ideal solution for protecting voltage sensitive high speed data lines. features ? low capacitance (0.20 pf typ, i/o to gnd) ? protection for the following iec standards: iec 61000?4?2 (level 4) ? low esd clamping voltage ? these devices are pb?free, halogen free/bfr free and are rohs compliant typical applications ? usb 3.0/3.1 ? mhl 2.0 ? esata maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit operating junction temperature range t j ?55 to +150 c storage temperature range t stg ?55 to +150 c lead solder temperature ? maximum (10 seconds) t l 260 c esd8101: iec 61000?4?2 contact iec 61000?4?2 air esd8111: iec 61000?4?2 contact iec 61000?4?2 air esd 23 23 30 30 kv kv kv kv stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. see application note and8308/d for further description of survivability specs. this document contains information on some products that are still under development. on semiconductor reserves the right to change or discontinue these products without notice. www. onsemi.com marking diagrams esd8111 (0201) wlcsp2 case 567av pin configuration and schematic t, f, x = device code m = date code 12 f m esd8101 (01005) dsn2 case 152ak = t see detailed ordering and shipping information on page 2 o f this data sheet. ordering information esd8101p (01005) dsn2 case tbd* x esd8111p (0201) wlcsp2 case tbd* x m * in development
esd8101, esd8111 www. onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) symbol parameter v rwm working peak voltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current v hold holding reverse voltage i hold holding reverse current r dyn dynamic resistance i pp maximum peak pulse current v c clamping voltage @ i pp v c = v hold + (i pp * r dyn ) i v v c v rwm v hold v br r dyn v c i r i t i hold ?i pp r dyn i pp v c = v hold + (i pp * r dyn ) v rwm v hold i r i t i hold v br electrical characteristics (t a = 25 c unless otherwise specified) parameter symbol conditions min typ max unit reverse working voltage v rwm i/o pin to gnd 3.3 v breakdown voltage v br i t = 1 ma, i/o pin to gnd 5.5 7.9 8.6 v reverse leakage current i r v rwm = 3.3 v, i/o pin to gnd 1.0 a reverse holding voltage v hold i/o pin to gnd 2.1 v holding reverse current i hold i/o pin to gnd 17 ma esd8101, esd8111 clamping voltage tlp (note 1) v c i pp = 8 a iec 61000?4?2 level 2 equivalent ( 4 kv contact, 4 kv air) 6.5 v i pp = 16 a iec 61000?4?2 level 2 equivalent ( 8 kv contact, 15 kv air) 10 junction capacitance c j v r = 0 v, f = 1 mhz 0.2 0.4 pf product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 1. ansi/esd stm5.5.1 ? electrostatic discharge sensitivity testing using transmission line pulse (tlp) model. tlp conditions: z 0 = 50 , t p = 100 ns, t r = 4 ns, averaging window; t 1 = 30 ns to t 2 = 60 ns. ordering information device package shipping ? ESD8101FCT5G dsn2 (pb?free) 10,000 / tape & reel esd8111fct5g wlcsp2 (pb?free) 10,000 / tape & reel esd8101pfct5g** side wall isolated 01005 10,000 / tape & reel esd8111pfct5g** side wall isolated 0201 10,000 / tape & reel ** in development. contact local sales rep for availability. ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
esd8101, esd8111 www. onsemi.com 3 typical characteristics figure 1. esd8101 cv characteristics figure 2. esd8111 cv characteristics v bias (v) v bias (v) 2.5 1.5 3.5 0.5 ?0.5 ?1.5 ?2.5 ?3.5 0 0.1 0.2 0.3 0.4 0.5 0.6 1.0 figure 3. esd8101 s21 insertion loss figure 4. esd8111 s21 insertion loss frequency (hz) frequency (hz) 1e10 1e9 1e8 1e7 ?10 ?8 ?4 ?2 0 2 figure 5. esd8101 capacitance over frequency figure 6. esd8111 capacitance over frequency frequency (ghz) frequency (ghz) 9 8 7 5 4 3 2 1 0 0.1 0.3 0.4 0.5 0.7 0.8 1.0 c (pf) c (pf) (db) capacitance (pf) 0.7 0.8 0.9 2.5 1.5 3. 5 0.5 ?0.5 ?1.5 ?2.5 ?3.5 0 0.1 0.2 0.3 0.4 0.5 0.6 1.0 0.7 0.8 0.9 ?6 3e10 1e10 1e9 1e8 1e7 ?10 ?8 ?4 ?2 0 2 (db) ?6 3e 10 0.2 0.6 0.9 6 9 8 7 5 4 3 2 1 0 0.1 0.3 0.4 0.5 0.7 0.8 1.0 capacitance (pf) 0.2 0.6 0.9 6 10 1 0
esd8101, esd8111 www. onsemi.com 4 typical characteristics figure 7. esd8101 positive tlp i?v curve figure 8. esd8111 positive tlp i?v curve v c , voltage (v) 20 18 14 12 8 4 2 0 0 2 6 8 10 14 18 20 figure 9. esd8101 negative tlp i?v curve figure 10. esd8111 negative tlp i?v curve tlp current (a) 4 12 16 610 16 0 2 10 4 6 8 v iec , equivalent (kv) v c , voltage (v) 20 18 14 12 8 4 2 0 0 2 6 8 10 14 18 20 tlp current (a) 4 12 16 610 16 0 2 10 4 6 8 v iec , equivalent (kv) v c , voltage (v) 20 18 14 12 8 4 2 0 0 ?2 ?6 ?8 ?10 ?14 ?18 ?20 tlp current (a) ?4 ?12 ?16 610 16 0 2 10 4 6 8 v iec , equivalent (kv) v c , voltage (v) 20 18 14 12 8 4 2 0 0 ?2 ?6 ?8 ?10 ?14 ?18 ?20 tlp current (a) ?4 ?12 ?16 610 16 0 2 4 6 8 v iec , equivalent (kv) 10
esd8101, esd8111 www. onsemi.com 5 iec 61000?4?2 spec. level test volt- age (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000?4?2 w aveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 11. iec61000?4?2 spec transmission line pulse (tlp) measurement transmission line pulse (tlp) provides current versus voltage (i?v) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. a simplified schematic of a typical tlp system is shown in figure 12. tlp i?v curves of esd protection devices accurately demonstrate the product?s esd capability because the 10s of amps current levels and under 100 ns time scale match those of an esd event. this is illustrated in figure 13 where an 8 kv iec 61000?4?2 current waveform is compared with tlp current pulses at 8 a and 16 a. a tlp i?v curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. figure 12. simplified schematic of a typical tlp system dut l s oscilloscope attenuator 10 m v c v m i m 50 coax cable 50 coax cable figure 13. comparison between 8 kv iec 61000?4?2 and 8 a and 16 a tlp waveforms
esd8101, esd8111 www. onsemi.com 6 package dimensions ? esd8101 (01005) dsn2, 0.435x0.23, 0.27p, (01005) case 152ak issue a a b e d bottom view b l 0.02 c top view a a1 c seating plane side view dim min max millimeters a 0.165 0.195 a1 ??? 0.030 b 0.177 0.193 d 0.435 bsc e 0.230 bsc solder footprint* dimensions: millimeters 0.44 0.23 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 1 l 0.112 0.128 0.16 recommended 1 pin 1 indicator e 0.270 bsc a m 0.05 b c a m 0.05 b c 2x e 2x 2x 0.02 c 2x 2x 0.02 c 0.05 c 2x 2x 2x package dimensions ? esd8111 (0201) wlcsp2, 0.6x0.3 case 567av issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. a b e d bottom view b 0.05 b a c 0.02 c top view 0.02 c a a1 0.02 c 0.02 c c seating plane side view dim min max millimeters a 0.25 0.30 a1 0.00 0.05 b 0.14 0.17 d 0.60 bsc e 0.30 bsc l 0.19 0.24 solder footprint* dimensions: millimeters 0.81 0.33 0.28 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. recommended e 0.36 bsc 2x 2x 2x l 2x 2x e 2x
esd8101, esd8111 www. onsemi.com 7 package dimensions ? esd8101p (01005)
esd8101, esd8111 www. onsemi.com 8 package dimensions ? esd8111p (0201) on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 esd8101/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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